The basic task of the SVX Sequencers is to coordinate data acquisition in the SVX chips and serialize the resulting data onto high speed fibers to be sent to data storage.

The Sequencers are 9U by 340mm circuit boards that reside in slots 2 through 21 of each of the eight Eurocard crates on the detector platform. Six crates are used by the SMT system and two crates are used by the CFT system. Geographic addressing is designed into the backplane for each slot for 1553 Remote Terminal identification.

In the SMT system, each Sequencer is connected to an Interface Board (and thus eight HDIs) via four 50-conductor 3M pleated–foil cable, a VRB via four optical fibers for data readout, the Sequencer Controller via the backplane, and the control system via the MIL-STD-1553 link which is also plugged into the backplane. In the CFT system, the setup is the same except the Sequencer is connected to AFE2 boards instead of an Interface Board. AFE2s have ADCs and FPGAs instead of SVX chips to read out Visible Light Photon Counters (VLPCs), but the data is read out in the same manner as the SVX.

In Initialize mode, the Sequencers interpret data from the 1553 data bus and then clock the appropriate download data pattern into the chips. This pattern is readable from the chips but is a destructive read operation, so a subsequent download must occur. In Acquire mode, the Sequencers advance the pipeline clock with each beam crossing, and the SVX preamps are reset during beam gaps. When a trigger occurs, a specific complex manipulation of the control signals occurs which extracts charge out of the correct pipeline cell and then the Sequencer sends a 53MHz clock which the chip uses to digitize this charge for each channel. In Readout mode, clocks are sent to the SVX at 26.5 MHz and the chip then sends channel ID and data back to the Sequencer in alternating fashion. The Sequencer serializes this data into a 1.062 Gb/s data stream, adds header and trailer information, and sends it via optical fiber to the VRBs in the Movable Counting House.

Diagnostic features are interfaced to the 1553 bus, and include a snapshot register to read the current state of important SVX control lines, and a built-in logic analyzer that records the same control lines for about 75us after a selectable trigger. A pattern of 64 words may be written via 1553 and sent to the VRBs for testing the gigabit links. The Finisar laser drivers' diagnostic links may be read via 1553, monitoring power output, temperature, laser serial number and other parameters. Other 1553 registers include SVX power on/off control, module serial number and a remote PLD programming register.