The Sequencer Controller is a 9U x 340 mm Eurostyle module residing in each Sequencer crate, and is used to give coarse timing commands to the SVX Sequencers which control acquisition and readout of the SVX chips and AFE2 boards. It is designed to be plugged into slot 1 of the custom Sequencer backplanes.

The Controller receives beam crossing timing information and triggering information via a single coax called the Serial Command Link which originates at the Trigger Framework. Information from this link is interpreted and transformed into general SVX data acquisition commands that go to each Sequencer via the backplane. These commands are encoded onto a serial link called the NRZ link which is a seven-bit repetitive code, sent on dedicated backplane lines to each Sequencer slot. These lines are used in conjunction with a dedicated differential 53MHz clock sent to each Sequencer slot. The seven bits are the framing bit, crossing bit, four bits for an encoded data command, and parity bit. Seven bits were chosen to remain synchronous with the Tevatron beam structure. A new code packet is sent every 132 ns. The framing bit is always set high and is monitored by a state machine to ensure that the link is in synch. The crossing bit is only set if there is beam for that particular 132ns period. The sixteen possible encoded data commands include commands such as Acquire, Preamp Reset, Level 1 Accept, Digitize, Readout, and Readout Abort.

The NRZ link has an adjustable delay system to synchronize the crossing command with actual beam crossings so that the SVX charge acquisition happens at the best time with respect to beam. There are three delays, 132ns, 18.8ns, and 2ns steps, writeable from a MIL-STD-1553 serial communication link. This 1553 link is also used to set various diagnostic modes.

To prevent missed triggers, the Controller sends a “Busy” signal back to the Trigger Framework based on a daisy chain of busy signals from the Sequencers. This is necessary because the SVXs may operate in sparsify mode, reading out only the channels over threshold, and readout may end at various times after a trigger. Since there is only one buffer on SVX2, a new trigger may be accepted only after readout has finished.