Hi Paul,

	Some comments for you on your last note.  If you think there is 
any confusion regarding the terminology, perhaps the notes below 
will assist in reminding folks what adjustments are implemented on 
the board.  I don't believe in mass mailings, so I'll leave it to you 
whether any of the below is worth further distribution.

Regards
John

1) I echo Fred's statement regarding the variation in pedestal 
between channels of a given SVX chip.  The results from silicon 
indicate that AVDD should be run between 200mV and 300mV 
higher than DVDD.  In the AFE, DVDD is derived from the bulk +5V 
digital supply and normally runs in the range of 4.9V to 5.1V for a 
given board, dependent on exactly where the Vicor supply is set.  
these can be adjusted for every group of eight AFE boards.   In the 
rev. 1A prototypes a fixed-output 5V linear regulator is used to 
generate AVDD from a separate +5.5V bulk supply.  On the 
revision 1C boards the fixed-output regulator has been replaced by 
an adjustable regulator (but with fixed divisor resistors - NO USER 
ADJUSTMENT!).  I have set the nominal output voltage to be 
+5.25V, which should be sufficient to stabilize the pedestals 
across a given SVX chip.

2) Please also let me clarify the terminology regarding SIFT 
adjustable parameters versus SVX adjustable parameters.  

	a) Each SIFT has a threshold voltage which is programmable 
via a DAC.  The DAC can be set via commands sent over the MIL-
STD 1553 bus.

	b) Because of the construction of the MCM, SIFT thresholds 
are set in PAIRS.  One DAC sets the threshold for TWO SIFTs, 
and a second DAC allows *small* adjustment of the one SIFT in 
the pair relative to the other SIFT in the pair.  The intended mode of 
operation is to set both DACs to the same value such that both 
SIFTs in a pair have the identical threshold setting.  Then, the 
second SIFT of the pair can be adjusted up or down relative to the 
first SIFT of the pair by adjusting the value written to the second 
DAC.  However, the range and resolution of the second DAC is tied 
to the setting of the first DAC, so only SMALL adjustments are 
designed to be supported.  

	You can't arbitrarily set the threshold of one SIFT to, say, 2 
volts and have the threshold of the second SIFT in the pair be set 
to 1 volt.  You can, however, set the threshold of one to be 1.6 volts 
and have the other at 1.7 volts.

	c) A completely different set of DACs allows adjustment of the 
SIFT-to-SVX charge transfer reference VREF on a SIFT-by-SIFT 
basis.  These DACs don't change the discriminator performance 
but do change the pedestal/dynamic range of the SVX channels 
connected to that particular SIFT.  In general the VREF is set the 
same for all four SIFTs within a given MCM, but again, slight 
variations to improve pedestal spread are expected to occur as the 
system is tuned.

3) The 'PCLMP effect' is twofold.  When the SIFT PCLMP clock is 
allowed to pulse every 396nsec, we see that pedestals in the SVX 
are more stable, BUT, because of an unfortunate trace layout in the 
MCM, 3 or 4 of the SVX channels (and always the same SVX 
channels in each MCM) get clobbered.  If the PCLMP clock is 
constrained to only run during the beam gaps, the victim channels 
return to operation but pedestals of all channels in the SVX show 
greater variation.  Yes, the affected channels of the SVX are ones 
connected to active SIFT channels.

I have long ago redesigned the programmable logic of the AFE 
board to implement a register which allows the onboard 
microprocessor to control whether PCLMP happens all the time or 
just during the beam gaps.  

4) There is also output-to-input crosstalk within the MCM itself 
such that if a significant percentage of channels of a given SIFT are 
firing, that digital activity will offset the thresholds of the other 
SIFTs within the same MCM.  However, the percentage is pretty 
large.  Under normal operation where one expects only a few 
percent of channels to fire at any given time, thresholds are not 
expected to be affected.  Most of the commentary made in this line 
of questioning has to do with 'unreal' scenarios such as setting the 
threshold of one side of the MCM to be extremely active while the 
other side is set to just above noise triggering.  In this case, yes, 
the 'near the edge' SIFTs do move based upon the excessive 
activity