September 10th 2002 CFT Trigger Commissioning MeetingIndexDFEA: L1muon; power supplies (Jamieson)global trigger timing change (Fred)Glink (Stefan)CTT integration (Levan, Ricardo)L2: DFES, STT (Steve)discriminator studies (Yurii & Yuri)DFE_WARE (Yurii)DFEA: L1muon; power supplies (Jamieson)The new firmware with separate output to L1muon has been downloaded; now we are dealing with a power supply issue: due to increased power consumption DFEA boards go into reset. This needs to be fixed before we can do further debugging of the system. (Note added 2002-9-13: both DFEA crates had their power cabling fixed during accesses, and seem to be working fine now.)control signals; global trigger timing change (Fred)Fred reported that as far as he knows all requested SCL control bits are handed to the DFE chain by SEQC, Sequencer and AFEs. He wants to do some further tests before the global framework timing change (by 2 x 132 ns) should occur. The global timing change will impact pipeline depths in the L1CTT system. Timing in the various pipelines is a task on our list that would have to be done anyway, with or without the change in global timing.Glink (Stefan)The temporary (receiver) fix is in everywhere, and seems to work. Crate x13 has most of its G-links plugged into the correct locations (see d0server1.fnal.gov/projects/triggerelectronics/locations&cables/cable_spreadseets/VRB_channels_AFE8_20020823.xls , or this link ). Slots 10,11,18 and 19 have their inputs fully populated, seem to be synchronizing, and will hopefully be included in the general readout at the next opportunity.The DFEx transition board redesign is well underway, with a design review on 2002-9-12. Steve Linn has done detailed frame error rate measurements, indicating we should see at most one event in a million corrupted/impeded by G-link synchronization loss (see below). CTT integration (Levan, Ricardo)Due to the DFEA power supply problem, not much debugging happened in the last week. As reported earlier, there are signals at the Trigger Framework (TFW), but the rates are fluctuating wildly, indicating timing/sync problems. We need the whole chain properly set up.The L1 Muon group (Rob et al.) offered use of their long haul debugging cables. We have three cables from the west side, one of which will be connected to a muon cable at the next suitable opportunity. Test vectors in the CTOC need further CTS debugging. The CTTT refuses to initialize with the CTOC-CTTT link test firmware; the platform board should be swapped with one of the CTS CTOC boards. L2: DFES, STT (Steve)From an email from Steve:3 CPSS boards are downloaded with production firmware. 1 CPSS board is downloaded with a STT a asynchronous fake event sender triggered by L1accept. Clock stability tests were performed on the L3 transmitters and all channels had a failure rate of better than 10**-10 per 16bit frame CPSS2 currently has a hardware or download problem. 5 STOV/STSX boards are downloaded with production firmware 1 STSX board is downloaded with a synchronous fake event sender. Clock stability tests were performed on he L3 transmitters and most channels had a failure rate of better than 3 x 10**-10 per 16bit frame STSX2 currently has a hardware problem resulting in a failure rate of 5 x 10^-7 per 16 bit frame. 4 CTQD boards are downloaded with production firmware, but no testing has been done. The level2 people have verified that they can read events from the CPSS, but tools to quantify testing currently do not exist. As a first step we have requested the capability to dump events to a file and also measure transmission/reception error rates. The STT people have solved most of their reception problems and could benefit from stable running conditions. We had hoped to measure clock stability from the L2 transmitters; however, power supply, DAQ, and other instabilities have prevented this. In general, it is very difficult to accomplish much with the system(s) in constant flux. SLL The L2STT group is planning a chain test with sextant 0, which is fed from our Supersectors 1 and 2. discriminator studies (Yurii & Yuri)Studies are just starting.DFE_WARE (Yurii)Yurii keeps adding features and building macros. (Note added 2002-9-13: Crate initialization for both DFEA crates worked fine after the power supply work and a small dfe_ware modification.) Please make sure to coordinate your dfe_ware usage with the CFT shifter (x8804).
Last modified September 13th, 2002, by SG. |