October 1st 2002 CFT Trigger Commissioning MeetingMinutes, October 1st CTT Meeting (taken by L. Babukhadia) Present: Satish, Carsten, Fred, Kyle, Jamieson, George, Steve, Stefano, Yurii, Michael and Marjorie (v/c).
IndexHardwareSequencers etc.CTOC L3 ReadoutL1CTTL2CTTDFE_ware, AFE controlReadout, ExaminesDiscriminator Studieshardware (Jamieson)- During last access, Jamieson was able to put in a fix on PS for the crates with CTOC and STOV boards. However, Yurii still reports some problems with the CTOC crate, but it needs to be investigated further. Tomorrow's (10/2) access 10/2 might be a good opportunity to address and hopefully resolve the issue.
- Two new transition board prototypes are here, and will be tested on the
bench by Thursday/Friday this week. As soon as they are ready, they will
be tested in CTS with target firmware, like CTOC.
back to index Sequencers etc.- Not much news here. Makoto and Fred are trying to measure pipeline depth at AFE/Mixer/DFEA in CTS. Procedure for this is well defined. back to indexCTOC L3 Readout- was successful last week. Two issues had obscured progress here: Ricardo was not using the latest L3 Sender firmware and some of DP links were misbehaving. With these out of the way, L3 output looked fine on LVDS/DP, and also L3 headers were seen getting through VTM/VRB. So, next step would be to see if Kyle can look at some of the data collected new CTOC firmware has been installed in the platform (last weekend).L1CTT- The Synch_Gap stability throughout the system is now the major suspect. Glitches in the turn structure had been observed at the TM input. Also some DFEAs had been reported to also provide similar glitches into L1Muon. However, the latest word on this from Rob is that he has to yet find a 'misbehaving' DFEA when DFEware shows green for Synch_Gap length.- CTOCs seem to now exhibit proper monitoring output for L1 Accepts -- they appear and disappear in ALL CTOCs in the platform depending on whether the run is going or paused. The FX does not seem to be working, but will be checked again in CTS. - Levan has suggested that maybe eliminating L1 Accepts in the CTT system would help in terms of understanding the system behavior and expected trigger term rates at least on testvectors. Everyone was supportive of this idea. There can be a switch put in DFEA to mask off L1 Accept, and in combination with testvectors this could become a powerful tool. Also, Mixer can turn off/on various control bits and this might be a good way to get started with this. Stefano agreed to provide detailed directions, and hopefully this can be added to DFEware by Yurri (and Makoto) soon. Note that with L1 Accepts turned off, we'll have to not forget to take our readout crate from the run. - We'll set up the L1CTT chain in CTS for long-term tests. This should allow us to look by scope at say tx_enables from DFEA and CTTT to see if the correct turn structure is present. Also, Stefano suggested that we could learn a lot by using a logic analyzer at Mixer level. - Another thing we might consider doing, and this is something that came up in post-meeting conversation Rob and I had, is to try and have only one DFEA active in the platform, with respective only one CTOC. I think this can be achieved by simply configuring all but one DFEA with blanks. That one special DFEA should the one handling Trigger Sector #22 (because of the way clock gets all the way to CTTT). This assumes that blank designs will guarantee all-zero output of DFEAs (to be confirmed with Jamieson). L2- Continuing to provide inputs for L2STT. Steve raised the issue of turn and crossing number generation. Levan had circulated an old e-mail from Dan Edmunds as to exactly how to run these counters. Qichun and Jamieson have already implemented it. A good idea is probably to compare the two implementations and merge then in one, making a canned version of these counters for use in every board. Steve will look into this. Then the issue is how do we verify this. Several ideas were brought up. At L2, one could also check what we send to them and what SCL/TFW tells them.- L2 DFEA code is progressing well. Jamieson has implemented L1 pipeline storing all tracks and clusters. Upon L1 Accept, these data will simply be packed for the L2 output to CTOC. Therefore, it is expected that there will be very little if any extra latency due to L2 in DFEA. This is very important from the point of view of understanding needed pipeline depth at CTOCs. DFEWare- Yurii has released a new version of DFEWare, which now includes CTOC monitoring, a la DFEAs. Occasionally, there is a problem of DB accessing. Makoto is working on this. Temporary fix is to dump DB into a text file and to use the instead. The fear is that this may not be an idea solution in a long run. But with a text file solution, at least this is not a show-stopper right now.Readout, Examines- There is a problem due to root libraries in CTT Examines in recent release versions. Temporarily, it can be restricted to some specific version that seems to work, making sure that respective release and libraries don't get deleted. Michael and Kyle are on this, they have reported the problem to Abid.- Kyle will try to look at the data from latest CTOCs in the platform. Discriminator Studies (Yurii & Yuri)- Yurii is making progress on understanding data integrity. Duplicate SVX info had been seen and is under investigation.- Jadwiga and Fred did discriminator threshold scans during calibration runs. Currently thresholds are set at about 2 pe above noise threshold, i.e. at about 4 pe absolute. More studies to follow to this end.
Last modified October 4th, 2002, by SG. |