D0 Silicon WWW Server

D0 Silicon Tracker

The D0 Silicon Tracker is part of the D0 Upgrade to be installed for operation with the Fermilab Main Injector. D0 was designed with the goals of efficient identification of leptons and jets over a wide rapidity region. This was achieved by using finely segmented, hermetic electromagnetic and hadronic calorimetry, muon detection using thick magnetized iron, and non magnetic inner tracking. The D0 upgrade extends the capability of the detector to include track momentum determination and vertexing while maintaining angular coverage to eta = +/-3. In addition to the Silicon Tracker the Upgrade includes:

A 2 Tesla superconducting solenoid magnet
Four superlayers (xuvx) of scintillating fiber tracking
A preshower detector surrounding the solenoid
New muon system and calorimeter electronics
Improvements to the trigger and DAQ systems

The Silicon Tracker consists of silicon disks and barrels formed into 6 disk/barrel modules. Each barrel module consists of 4 (radial) layers of detector ladder assemblies. Layers one and three are single sided silicon microstrip detectors and layers two and four are double sided with 2-degree stereo angle. Each disk module has 12 wedge shaped double-sided detectors with a 30 degree stereo angle. There are also three sets of end disks on each side. The Silicon Tracker design is summarized in the D0 Silicon Tracker Technical Design Report (ps file, ~5.5 MB This is D0 note Number 2169 dated July 1,1994. Note that some pictures in the printed version were pasted in by hand and do not appear in the file.)

Go to the Run 2B pages instead

Silicon Group Organization, Procedures and Schedule

Commissioning

SMT shifter's page

Or go directly to shift instructions (version 1.3)

Or go directly to SMT shift scheduling

Or go to Aurelio’s Powerpoint Tutorial for the DAQ people (June 11,'01)

Or go to the older D0SMT commissioning page

Or go directly to the older shift instructions

Detector Design

Writeups of D0SMT Design and Construction

Detector Parameter Tables

Table of detector parameters (size, # channels ..).

Table of barrel detector orientations

U.C. Riverside.

Notes on radiation levels and radiation damage and a picture of the barrel mask design.

Specifications and drawings for F disk and 90 Degree detectors

Radiation Background Simulation

Results of GCALOR simulations of the neutral and charged particle background expected in the central tracker (UPG_GEANT version of October 95). Calculation of radiation damage expected in the inner barrel layer.

Detector Simulation

Results of GEANT simulations of the silicon tracker are available on John Drinkard's WWW server at University of California, Irvine. This contains studies of resolution and occupancy.

Drawings and Photographs

Drawings and pictures of silicon tracker components. Including 90 degree barrel and F disk detector mask drawings.

Notes

Engineering and design notes. Coordinate system drawings.

Talks

Postcript versions of talks at conferences and D0 collaboration meetings.

Vertex Images

Event simulations and structural images courtesy of Saul Youssef.

D0SMT local coordinate system and indexing scheme

http://www-d0.fnal.gov/~meena/d0_private/silicon/coords/smt-numb/sld001.htm

Translation from/to construction coordinates

Freya's Ultimate Compendium of numbering schemes for the SMT

Breese's final Master Spreadsheet !!!

Barrel and Disk Module Assembly

Silicon Module Assembly Page and Cosmic Ray Test Stand

Detector Production and Testing

Production Database including procedures, reports and schedules

Charts and Tables of planned and achieved module production

Double sided ladder production information

Detector acceptance specifications for 9 and 6 chip detectors (3/21/99)

Test Stand Operation

Write-up of Laser Test Stand Operation using John Rha's software.

Basic instructions for running the DART system.

More information on the ANALYSIS program newsil with links to the DART data

format and the C code.

Instructions for operation of the SGI-based burn-in test

Instructions for operation for the stand-alone sequencer-based burn-in test

Software plans for Stand Alone Sequencer (10/22/98).

Test Stand Electronics

Block diagram of rack Assembly patch panel Debugging patch pannel

Electronics

SVX IIE Guide

Beginners Guide to the SVX II. Updated for the SVX IIe.

SVX II Electronics

Notes on the operation of the DAQ system for the SVX II. Circuit diagrams for noise analysis. Images of the SVXII. Specifications for the SVX sequencer and Stand Alone Sequencer. Noise calculations.

HDI Drawings and Schematics HDI reference drawings

Interface module information

Interface Module Schematics