Interface Module meeting Apr 6 3pm Salle des Heros
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Attendees: Foglesong, Johnson, Leflat, Matulik, Zverev,
and via telephone, McDavitt, Sidwell, and Sobering.

Agenda:

1) New drawings of layout: Foglesong
   John proposed another possible crate orientation, with cards still
face up, but with the crate rotated 90 deg to allow more room for 
a heat exchanger. The difficulty raised with this orientation is
that inboard cards (closest to the calorimeter) will be hard to
get at. A draftsman will begin next week to draw the system including
cable runs. This should help firm up our plans.

2) Relay tests (bias control): Matulik. Next week perhaps.

3) Backplane plans (connectors): Sidwell
    Proposal to :
   a) recycle J2/J3 from sequencer crate ( with solder mask fix).
      In this scheme slot 1 is not populated.
   b) Mechanical drawing of new J1 backplane (McDavitt)
   c) For HV (detector bias) run 16-conductor twist and flat from
     HV fanout, probably located on the Platform. 
   d) For SVX power, once voltage drops are calculated from 3-9chip
HDIs, to try to use different power supplies for AVDD rather than
more complicated schemes. 
   
a)-c) were non-controversial, after some clarification of how the
1553 receiver is laid out. (Sidwell was confused). One possible problem 
with the current 1553 receiver is that is used a transformer for isolation- 
this will not work perhaps in 300G magnetic field. Marvin promised to look 
into this.

4) Current limiter schemes (see new current limit
switch from Johnny Green). Leflat/Zverev proposal to use a new comparator
looking at the output voltage from the current-measuring op-amp is still
the preferred solution.
   --->>> To do: understand current demands at turn-on. Put scope on the
op amp and check what happens at turnon. 

5) Impedance matching: Some discussion of Schottky diodes and other schemes..
Still up in the air in my opinion.


Homework:
1) Layout drawings, Foglesong
2) J1, J2, J3 backplanes, with connectors: EDL
3) Relay tests: Matulik
4) 1553 receiver: Johnson
5) Specification of what/where to stuff Rev 2 interface module:
   Sobering, w Leflat and Zverev. 
6) SVX power needs: Sidwell
7) Continued IM tests: Leflat, Zverev